received his Ph.D. from University of Minnesota in '93 and was with AT&T Bell Laboratories from 93-95 where he was the lead chip architect for a 51.84 Mb/s ATM-LAN transceiver IC (part no. T7651), and some of the world's first 51.84 Mb/s VDSL chip-set (part no. T7660 (VTU-R receiver) and T7664 (quad VTU-O transmitter)) IC's. The latter were employed in field trials in North America and South Korea in mid-90s. While at AT&T he also contributed significantly to the ATM Forum. Since '95, he is a faculty member in the ECE Department at UIUC, where he is currently an Associate Professor with research focus on developing low-power and high-performance technologies for the design of next generation communication ICs.